The first version of my 7-segment wall clocks. This was done some
time in 2001. It's a surprise that it still works after 13 years
of continuous use, since the design is as minimal as it can get.
All good electronics design rules are discarded, like LED current
limit resistors or bypass capacitors. Who wants those anyway?
There are just the displays, the CPLD, clock oscillator, three
diodes and switches with pull-up resistors. And lots of wiring.
The clock is built on veroboard. No schematic was made, the
MAX7128 design was just compiled with MAX+PLUS, the program chose
which pins to use, and then the veroboard was wired according to
report file. At first attempt the displays were very, very dim
because 5 V was not enough for Kingbright SC18-11SRWA displays.
The solution was to add three 1N4001 diodes in series between MAX
GND and supply GND, which causes MAX GND potential to be about +2
V. With this hack, the MAX I/O lines are about 2V when driven low
and about 7V when driven high. The displays work quite happily
with these voltage levels.
The complete Altera MAX+PLUS II project directory for the clock is available for download below. The .zip file contains AHDL source file, reports and programming files.
The veroboard fits nicely in Velleman
page created 1.8.2014
last updated 1.8.2014 firstname.lastname@example.org